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1 for more information www.linear.com/ltc2943 typical application features description multicell battery gas gauge with temperature, voltage and current measurement the lt c ? 2943 measures battery charge state, battery volt- age, batter y current and its own temperature in portable product applications. the wide input voltage range allows use with multicell batteries up to 20 v. a precision coulomb counter integrates current through a sense resistor between the batterys positive terminal and the load or charger. voltage, current and temperature are measured with an internal 14- bit no latency ? ? adc. the measurements are stored in internal registers accessible via the onboard i 2 c/smbus interface. the ltc2943 features programmable high and low thresh- olds for all four measured quantities. if a programmed threshold is exceeded, the device communicates an alert using either the smbus alert protocol or by setting a flag in the internal status register. the ltc2943 requires only a single low value sense resistor to set the measured current range. total charge error vs differential sense voltage applications n measures accumulated battery charge and discharge n 3.6v to 20 v operating range for multiple cells application n 14-bit adc measures voltage, current and t emperature n 1% voltage, current and charge accuracy n 50 mv sense voltage range n high side sense n general purpose measurements for any battery chemistry and capacity n i 2 c/smbus interface n configurable alert output/charge complete input n quiescent current less than 120a n small 8-lead 3mm 3mm dfn package n power tools n electric bicycles n portable medical equipment n video cameras l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and no latency and powerpath are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. v sense (mv) 0.1 ?2.0 charge error (%) 0 ?0.5 ?1.0 ?1.5 1.5 1.0 0.5 2.0 1 10 100 2943 ta01b v sense + = 10v sense + alcc sda scl ltc2943 charger 2k2k 2k 1a load r sense 50m multicell li-ion 2943 ta01a sense ? + gnd 1f v dd 3.3v p ltc2943 2943fa
2 for more information www.linear.com/ltc2943 pin configuration absolute maximum ratings (notes 1, 2) top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 9 4 3 2 1sense + gnd gnd scl sense ? gnd alcc sda t jmax = 150c, ja = 100c/w exposed pad ( pin 9) pcb gnd connection op tional electrical characteristics symbol parameter conditions min typ max units power requirements v sense + supply voltage 3.6 20 v i supply supply current (note 3) battery gas gauge on, adc sleep battery gas gauge on, adc on shutdown l l l 80 650 15 120 750 25 a a a i sense + pin current (note 3) battery gas gauge on, adc sleep battery gas gauge on, adc on shutdown 80 500 15 a a a i sense C pin current (note 3) battery gas gauge on, adc sleep battery gas gauge on, adc on shutdown 1 150 1 a a a v uvlo undervoltage lockout threshold v sense + falling l 3.0 3.3 3.6 v coulomb counter v sense sense voltage differential input range v sense + C v sense C l 50 mv r idr differential input resistance across sense + and sense C (note 8) 400 k q lsb charge lsb (note 4) prescaler m = 4096(default), r sense = 50m 0.340 mah the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (note 2) order information supply voltage ( sense + ) ........................... C0. 3 v to 24 v scl , sda , alcc voltage .............................. C 0.3 v to 6v sense C ............... (C0.3 v + v sense + ) to (v sense + + 0.3 v) operating ambient temperature range ltc 29 43 c ............................................... 0 c to 70 c ltc 29 43 i ............................................ C 40 c to 85 c storage temperature range .................. C 65 c to 150 c lead free finish tape and reel part marking* package description temperature range ltc2943cdd#pbf ltc2943cdd#trpbf lgcs 8-lead (3mm 3mm) plastic dfn 0c to 70c ltc2943idd#pbf ltc2943idd#trpbf lgcs 8-lead (3mm 3mm) plastic dfn C40c to 85c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ltc2943 2943fa
3 for more information www.linear.com/ltc2943 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. symbol parameter conditions min typ max units tce total charge error (note 5) 10mv |v sense | 50mv dc 10mv |v sense | 50mv dc 1mv |v sense | 10mv dc (note 8) l l 1 1.5 3.5 % % % v ose effective differential offset voltage (note 9) v sense 500v, v sense + = 10v l 5 10 v voltage measurement adc resolution (no missing codes) (note 8) l 14 bits v fs(v) full-scale voltage conversion 23.6 v v lsb quantization step of 14-bit voltage adc (note 6) 1.44 mv tue v voltage total unadjusted error l 1 1.3 % % gain v voltage gain accuracy l 1.3 % inl v integral nonlinearity v sense + > 5v l 1 4 lsb 3.6v v sense + 5v l 8 lsb t conv(v) voltage conversion time l 48 ms current measurement adc resolution (no missing codes) (note 8) l 12 bits v fs(i) full-scale current conversion l 60 mv v sense sense voltage differential input range v sense + C v sense C l 50 mv i lsb quantization step of 12-bit current adc (note 6) 29.3 v gain i current gain accuracy l 1 1.3 % % v os(i) offset 1 10 lsb inl i integral nonlinearity l 1 4 lsb t conv(i) current conversion time l 8 ms temperature measurement adc resolution (no missing codes) (note 8) l 11 bits t fs full-scale temperature 510 k t lsb quantization step of 11-bit temperature adc (note 6) 0.25 k tue t temperature total unadjusted error v sense + 5v (note 8) l 3 5 k k t conv(t) temperature conversion time l 8 ms digital inputs and digital outputs v ith(hv) logic input threshold v sense + 5v l 0.8 2.2 v v ith(lv ) 3.6v < v sense + < 5v 0.5 1.8 v v ol low level output voltage, alcc, sda i = 3ma, v sense + 5v l 0.4 v i in input leakage, alcc , scl, sda v in = 5v l 1 a c in input capacitance, alcc , scl, sda (note 8) l 10 pf ltc2943 2943fa
4 for more information www.linear.com/ltc2943 timing diagram electrical characteristics note 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2. all currents into pins are positive, all voltages are referenced to gnd unless otherwise specified. note 3. i supply = i sense + + i sense C . in most operating modes, i supply is flowing in sense + pin. only during adc conversions, current is flowing in sense C pin as well. typically, i sense C = v sense C /150k during adc voltage conversion and i sense C = 20a during adc current conversion. note 4. the equivalent charge of an lsb in the accumulated charge register depends on the value of r sense and the setting of the internal prescaling factor m: q lsb = 0.340mah ? (50m/r sense ) ? (m/4096) see choosing r sense and choosing coulomb counter prescaler m section for more information. 1mah = 3.6c (coulombs) note 5. deviation of q lsb from its nominal value. note 6. the quantization step of the 14-bit adc in voltage mode,12-bit adc in current mode and 11-bit adc in temperature mode is not the same as the lsb of the respective combined 16-bit registers. see voltage, current and temperature registers section for more information. note 7. c b = capacitance of one bus line in pf (10pf c b 400pf). note 8. guaranteed by design, not subject to test. note 9. see effect of differential offset voltage on total charge error section. symbol parameter conditions min typ max units t pcc minimum charge complete (cc) pulse width 1 s i 2 c timing characteristics f scl(max) maximum scl clock frequency l 400 900 khz t buf(max) bus free time between stop/start l 1.3 s t su( sta (min)) minimum repeated start set-up time l 600 ns t hd( sta (min)) minimum hold time (repeated) start condition l 600 ns t su(sto(min)) minimum set-up time for stop condition l 600 ns t su( dat (min)) minimum data setup time input l 100 ns t hd( dat ( min)) minimum data hold time input l 50 ns t hddato data hold time input output l 0.3 0.9 s t of data output fall time (notes 7, 8) l 20 + 0.1 ? c b 300 ns the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. figure 1. definition of timing on i 2 c bus sda scl 2943 td01 t hd(sta) start condition t su(dat) t hd(dat0) t hd(dat1) t hd(sta) t su(sto) t su(sta) stop condition start condition repeated start condition t of t buf ltc2943 2943fa
5 for more information www.linear.com/ltc2943 typical performance characteristics current measurement adc integral nonlinearity current measurement adc gain error supply current vs supply voltage shutdown supply current vs supply voltage voltage measurement adc total unadjusted error total charge error vs differential sense voltage total charge error vs supply voltage total charge error vs temperature voltage measurement adc integral nonlinearity v sense + (v) 0 charge error (%) ?1.00 ?0.50 ?0.25 0 1.00 0.25 10 15 20 2943 g02 ?0.75 0.50 0.75 5 25 v sense = 10mv v sense = 50mv temperature (c) ?50 charge error (%) ?1.00 ?0.50 ?0.25 0 0.50 25 50 2943 g03 ?0.75 0.75 1.00 0.25 ?25 0 75 100 v sense = 10mv v sense = 50mv v sense + (v) 0 i supply (a) 80 90 110 100 2943 g04 70 60 5 10 15 20 25 50 40 t a = 25c t a = ?40c t a = 85c v sense + (v) 0 5 i supply (a) 10 15 25 30 5 2015 2943 g05 20 10 25 t a = 85c t a = ?40c t a = 25c v sense ? (v) 0 inl (v lsb ) 15 2944 g07 ?2 0 2 4 ?8 ?4 ?6 5 10 20 25 t a = ?40c t a = 85c t a = 25c v sense ? (v) 0 ?1.0 total unadjusted error (%) 0 1.0 0.5 15 20 2943 g06 ?0.5 5 10 25 t a = 85c t a = 25c t a = ?40c v sense (mv) 0.1 ?1 charge error (%) 0 ?2 2 1 1 10 100 2943 g01 ?3 3 v sense + = 3.6v to 20v v sense (mv) inl (i lsb ) 0 2943 g09 ?1 0 1 2 ?3 ?50 ?25 25 50 3 ?2 v cc = 10v, t a = ?40 to 85c v sense ? (v) ?1.0 gain error (%) ?0.5 0 1.0 15 2943 g08 0.5 50 10 20 25 t a = ?40c to 85c ltc2943 2943fa
6 for more information www.linear.com/ltc2943 pin functions sense + (pin 1): positive current sense input and power supply. connect to load/charger side of the sense resistor. v sense + operating range is 3.6 v to 20 v. sense + is also an input to the adc during current measurement. bypass to gnd with a 1 f capacitor located as close to pin 1 and pin 2 as possible. gnd (pin 2, pin 3, pin 7): device ground. connect directly to the negative battery terminal. scl (pin 4): serial bus clock input. sda (pin 5): serial bus data input and output. alcc (pin 6): alert output or charge complete input. configured either as an smbus alert output or charge complete input by control register bits b [2:1]. at power- up, the pin defaults to alert mode conforming to the smbus alert response protocol. it behaves as an open-drain logic output that pulls to gnd when any threshold register value is exceeded. when configured as a charge complete input, connect to the charge complete output from the battery charger circuit. a low level at cc sets the value of the accumulated charge (registers c, d) to ffffh. sense C (pin 8): negative current sense input. connect sense C to the positive battery terminal side of the sense resistor. the voltage between sense C and sense + must remain within 50 mv in normal operation. sense C is also an input to the adc during voltage and current measure- ment. exposed pad (pin 9): exposed pad may be left open or connected to device ground (gnd). typical performance characteristics current measurements noise voltage measurements noise temperature error vs temperature 29.3v/lsb ?3 0 counts 250 200 150 100 50 300 350 400 450 ?2 ?1 210 3 2943 g12 800 readings temperature (c) ?50 ?25 ?3 temperature error (c) ?2 ?1 0 1 2 3 0 755025 100 2943 g10 v sense + = 3.6v v sense + = 5.5v v sense + = 10v v sense + = 20v 1.44mv/lsb 0 counts 500 400 300 200 100 600 700 800 900 ?2 ?1 210 2943 g11 ltc2943 2943fa
7 for more information www.linear.com/ltc2943 block diagram v supply coulomb counter ltc2943 2943 bd reference generator temperature sensor accumulated charge register oscillator f = 10khz clk i 2 c/ smbus cc al alcc scl sda ref clk ref + ref ? adc data and control registers mux sense ? sense + gnd gnd gnd in 7 8 2 3 1 6 4 5 ltc2943 2943fa
8 for more information www.linear.com/ltc2943 operation overview the ltc2943 is a battery gas gauge designed for use with multicell batteries with terminal voltages from 3.6v to 20 v. it measures battery charge and discharge, battery voltage, current and its own temperature. a precision analog coulomb counter integrates current through a sense resistor between the batterys positive terminal and the load or charger. battery voltage, battery current and silicon temperature are measured with an internal adc. coulomb counter charge is the time integral of current. the ltc2943 mea- sures charge by monitoring the voltage developed across a sense resistor. the differential voltage between sense + and sense C is applied to an auto- zeroed differential analog integrator to infer charge. when the integrator output ramps to refhi or reflo levels, switches s1, s2, s3 and s4 toggle to reverse the ramp direction (figure 2). by observing the condition of the switches and the ramp direction, polarity is determined. this approach also significantly lowers the impact on offset of the analog integrator as described in the differential offset voltage section. a programmable prescaler effectively increases integration time by a factor m programmable from 1 to 4096. at each underflow or overflow of the prescaler, the accumulated charge register ( acr) value is incremented or decremented one count. the value of accumulated charge is read via the i 2 c interface. voltage, current and temperature adc the ltc2943 includes a 14- bit no latency ? analog-to- digital converter, with internal clock and voltage reference circuits. the adc can be used to monitor the battery voltage at sense C or the battery current flowing through the sense resistor or to convert the output of the on-chip tempera- ture sensor. conversion of voltage, current and temperature are trig- gered by programming the control register via the i 2 c interface. the ltc2943 includes a scan mode where voltage, current and temperature conversion measure- ments are executed every 10 seconds. at the end of each conversion the corresponding registers are updated and the converter goes to sleep to minimize quiescent current. the temperature sensor generates a voltage proportional to temperature with a slope of 2mv/k resulting in a volt- age of 600mv at 27c. power-up sequence when sense + rises above a threshold of approximately 3.3v, the ltc2943 generates an internal power-on reset (por) signal and sets all registers to their default state. in the default state, the coulomb counter is active while the voltage, current and temperature adc is switched off. the accumulated charge register is set to mid-scale (7fffh), all low threshold registers are set to 0000 h and all high threshold registers are set to ffffh. the alert mode is enabled and the coulomb counter prescaling factor m is set to 4096. 2943 f02 refhi s1 v cc s2 s3 s4 reflo gnd sense + r sense i bat battery + load charger sense ? 1 8 2 m prescaler acr ? + ? + ? + control logic polarity detection figure 2. coulomb counter section of the ltc2943 ltc2943 2943fa
9 for more information www.linear.com/ltc2943 internal registers the ltc2943 register map is shown in table 1. the ltc2943 integrates current through a sense resistor, measures battery voltage, current and temperature and stores the results in internal 16- bit registers accessible via i 2 c. high and low limits can be programmed for each measured quantity. the ltc2943 continuously monitors these limits and sets a flag in the status register when a limit is exceeded. if the alert mode is enabled, the alcc pin pulls low. table 1. register map address name register description r/w default 00h a status r see table 2 01h b control r/w 3ch 02h c accumulated charge msb r/w 7fh 03h d accumulated charge lsb r/w ffh 04h e charge threshold high msb r/w ffh 05h f charge threshold high lsb r/w ffh 06h g charge threshold low msb r/w 00h 07h h charge threshold low lsb r/w 00h 08h i voltage msb r 00h 09h j voltage lsb r 00h 0ah k voltage threshold high msb r/w ffh 0bh l voltage threshold high lsb r/w ffh 0ch m voltage threshold low msb r/w 00h 0dh n voltage threshold low lsb r/w 00h 0eh o current msb r 00h 0fh p current lsb r 00h 10h q current threshold high msb r/w ffh 11h r current threshold high lsb r/w ffh 12h s current threshold low msb r/w 00h 13h t current threshold low lsb r/w 00h 14h u temperature msb r 00h 15h v temperature lsb r 00h 16h w temperature threshold high r/w ffh 17h x temperature threshold low r/w 00h r = read, w = write applications information the status of the charge, voltage, current and temperature alerts is reported in the status register shown in table 2. table 2. status register (a) bit name operation default a[7] reserved a[6] current alert indicates one of the current limits was exceeded 0 a[5] accumulated charge overflow/ underflow indicates that the value of the acr hit either top or bottom 0 a[4] temperature alert indicates one of the temperature limits was exceeded 0 a[3] charge alert high indicates that the acr value exceeded the charge threshold high limit 0 a[2] charge alert low indicates that the acr value exceeded the charge threshold low limit 0 a[1] voltage alert indicates one of the voltage limits was exceeded 0 a[0] undervoltage lockout alert indicates recovery from undervoltage. if set to 1, a uvlo has occurred and the contents of the registers are uncertain 1 after each voltage, current or temperature conversion, the conversion result is compared to the respective threshold registers. if a value in the threshold registers is exceeded, the corresponding bit a[6], a[4] or a[1] is set. the accumulated charge register ( acr) is compared to the charge thresholds every time the analog integrator increments or decrements the prescaler. if the acr value exceeds the threshold register values, the corresponding bit a[3] or a[2] are set. bit a[5] is set if the accumulated charge registers ( acr) overflows or underflows. at each overflow or underflow, the acr rolls over and resumes integration. the undervoltage lockout ( uvlo) bit of the status register a[0] is set if, during operation, the voltage on the sense + pin drops below 3.5 v without reaching the por level. the analog parts of the coulomb counter are switched off while the digital register values are retained. after recovery of the supply voltage the coulomb counter resumes integrating with the stored value in the accumulated charge registers but it has missed any charge flowing while sense + < 3.5v. ltc2943 2943fa
10 for more information www.linear.com/ltc2943 all status register bits are cleared after being read by the host, but might be reasserted after the next temperature, voltage or current conversion or charge integration, if the corresponding alert condition is still fulfilled. control register (b) the operation of the ltc2943 is controlled by program - ming the control register. table 3 shows the organization of the 8-bit control register b[7:0]. table 3. control register b bit name operation default b[7:6] adc mode [11] automatic mode: continuously performing voltage, current and temperature conversions [ 10] scan mode: performing voltage, current and temperature conversion every 10s [01] manual mode: performing single conversions of voltage, current and temperature then sleep [00] sleep [00] b[5:3] prescaler m sets coulomb counter prescaling factor m between 1 and 4096. default is 4096. maximum value is limited to 4096 [111] b[5:3] m 000 1 001 4 010 16 011 64 100 256 101 1024 110 4096 111 4096 bit name operation default b[2:1] alcc configure configures the alcc pin. [10] alert mode. alert functionality enabled. pin becomes logic output. [01] charge complete mode. pin becomes logic input and accepts charge complete inverted signal (e.g., from a charger) to set accumulated charge register (c,d) to ffffh. [00] alcc pin disabled. [11] not allowed. [10] b[0] shutdown shut down analog section to reduce i supply . [0] power down b[0] setting b[0] to 1 shuts down the analog parts of the ltc2943, reducing the current consumption to less than 15a ( typical). the circuitry managing i 2 c communica- tion remains operating and the values in the registers are retained. note that any charge flowing while b[0] is 1 is not measured and any charge information below 1 lsb of the accumulated charge register is lost. alert/charge complete configuration b[2:1] the alcc pin is a dual function pin configured by the control register. by setting bits b[2:1] to [10] (default), the alcc pin is configured as an alert pin following the smbus protocol. in this configuration, the alcc is pulled low if one of the four measured quantities ( charge, voltage, current, temperature) exceeds its high or low threshold or if the value of the accumulated charge register overflows or underflows. an alert response procedure started by the master resets the alert at the alcc pin. if the configura- tion of the alcc pin is changed while it is pulled low due to an alert condition, the part will continue to pull alcc low until a successful alert response procedure ( ara) has been issued by the master. for further information see the alert response protocol section. setting the control bits b[2:1] to [01] configures the alcc pin as a digital input. in this mode, a low input on the alcc pin indicates to the ltc2943 that the battery is full and the accumulated charge register is set to its maximum, value ffffh. applications information ltc2943 2943fa
11 for more information www.linear.com/ltc2943 if neither the alert nor the charge complete functionality is desired, bits b[2:1] should be set to [00]. the alcc pin is then disabled and should be tied to the supply of the i 2 c bus with a 10k resistor. avoid setting b[2:1] to [11] as it enables the alert and the charge complete modes simultaneously. choosing r sense to achieve the specified precision of the coulomb counter, the differential voltage between sense + and sense C must stay within 50 mv. with input signals up to 300 mv the ltc2943 will remain functional but the precision of the coulomb counter is not guaranteed. the required value of the external sense resistor, r sense , is determined by the maximum input range of v sense and the maximum current of the application: r sense 50mv i max the choice of the external sense resistor value influences the gain of the coulomb counter. a larger sense resistor gives a larger differential voltage between sense + and sense C for the same current resulting in more precise coulomb counting. the amount of charge represented by the least significant bit (q lsb ) of the accumulated charge (registers c, d) is equal to: q lsb = 0.340mah ? 50m? r sense ? m 4096 or q lsb = 0.340mah ? 50m? r sense when the prescaler is set to its default value of m = 4096. note that 1mah = 3.6c (coulomb). choosing r sense = 50mv /i max is not sufficient in applications where the battery capacity (q bat ) is very large compared to the maximum current (i max ): q bat >i max ? 22hours for such low current applications with a large battery, choosing r sense according to r sense = 50mv/i max can lead to a q lsb smaller than q bat /2 16 and the 16- bit accu- mulated charge register may underflow before the battery is exhausted or overflow during charge. choose, in this case, a maximum r sense of: r sense 0.340mah ? 2 16 q bat ? 50m? in an example application where the maximum current is i max = 100 ma, calculating r sense = 50mv/i max would lead to a sense resistor of 500 m. this gives a q lsb of 34ah and the accumulated charge register can represent a maximum battery capacity of q bat = 34ah?65535 = 2228mah. if the battery capacity is larger, r sense must be lowered. for example, r sense should be reduced to 150m if a battery with a capacity of 7200mah is used. choosing coulomb prescaler m b[5:3] if the battery capacity (q bat ) is small compared to the maximum current (i max ) the prescaler value m should be changed from its default value (4096). in these applications with a small battery but a high maxi - mum current, q lsb can get quite large with respect to the battery capacity. for example, if the battery capacity is 100mah and the maximum current is 1 a, the standard equation leads to choosing a sense resistor value of 50m, resulting in: q lsb = 0.340mah = 1224mc the battery capacity then corresponds to only 294 q lsb and less than 0.5% of the accumulated charge register is utilized. to preserve digital resolution in this case, the ltc2943 includes a programmable prescaler. lowering the prescaler factor m reduces q lsb to better match the accumulated charge register to the capacity of the battery. the prescaling factor m can be chosen between 1 and its default value of 4096. the charge lsb then becomes: q lsb = 0.34mah ? 50m? r sense ? m 4096 applications information ltc2943 2943fa
12 for more information www.linear.com/ltc2943 to use as much of the range of the accumulated charge register as possible the prescaler factor m should be chosen for a given battery capacity q bat and a sense resistor r sense as: m 4096 ? q bat 2 16 ? 0.340mah ? r sense 50m? m can be set to 1, 4, 16, ... 4096 by programming b[5:3] of the control register as m = 2 2?(4 ? b[5] + 2 ? b[4] + b[3]) . the default value is 4096. in the above example of a 100 mah battery and an r sense of 50m , the prescaler should be programmed to m = 64. the q lsb is then 5.313 ah and the battery capacity corresponds to roughly 18821 q lsb s. figure 3 illustrates the best choice for prescaler value m and the sense resistor as function of the ratio between battery capacity (q bat ) and maximum current (i max ). it can be seen, that for high current applications with low battery capacity the prescaler value should be reduced, whereas in low current applications with a large battery the sense resistor should be reduced with respect to its default value of 50mv/i max . adc mode b[7:6] the ltc2943 features an adc which measures either voltage on sense C ( battery voltage), voltage difference between sense + and sense C ( battery current) or tem- perature via an internal temperature sensor. the reference voltage and clock for the adc are generated internally. the adc has four different modes of operation as shown in table 3. these modes are controlled by bits b[7:6] of the control register. at power-up, bits b[7:6] are set to [00] and the adc is in sleep mode. a single conversion of the three measured quantities is initiated by setting the bit b[7:6] to [01]. after three conversions ( voltage, current and temperature), the adc resets b[7:6] to [00] and goes back to sleep. the ltc2943 is set to scan mode by setting b[7:6] to [10]. in scan mode the adc converts voltage, current, then temperature, then sleeps for approximately 10 sec - onds. it then reawakens automatically and repeats the three conversions. the chip remains in scan mode until reprogrammed by the host. programming b[7:6] to [11] sets the chip into automatic mode where the adc continuously performs voltage, current and temperature conversions. the chip stays in automatic mode until reprogrammed by the host. programming b[7:6] to [00] puts the adc to sleep. if control bits b[7:6] change within a conversion, the adc will complete the running cycle of conversions before entering the newly selected mode. a conversion of voltage requires 33ms ( typical), and cur - rent and temperature conversions are completed in 4.5ms (typical). at the end of each conversion, the corresponding registers are updated. if the converted quantity exceeds the values programmed in the threshold registers, a flag is set in the status register and the alcc pin is pulled low (if alert mode is enabled). during adc conversions additional currents are sunk from sense + and sense C , refer to the electrical characteristics table for details. applications information figure 3. choice of sense resistor and prescaler as function of battery capacity and maximum current 2943 f03 m = 1 0.005h q bat /i max 0.08h 0.34h 1.4h 5.5h 22h m = 4 m = 16 m = 64 m = 256 m = 1024 m = 4096 0.02h r sense 50mv i max r sense 0.34mah ? 2 16 q b at ? 50m ltc2943 2943fa
13 for more information www.linear.com/ltc2943 alert thresholds registers (e,f,g,h,k,l,m,n,q,r,s, t,w,x) for each of the measured quantities ( battery charge, voltage, current and temperature) the ltc2943 features high and low threshold registers. at power-up, the high thresholds are set to ffffh while the low thresholds are set to 0000 h, with the effect of disabling them. all thresholds can be programmed to a desired value via i 2 c. as soon as a measured quantity exceeds the high threshold or falls below the low threshold, the ltc2943 sets the cor - responding flag in the status register and pulls the alcc pin low if alert mode is enabled via bits b[2:1]. accumulated charge register (c,d) the coulomb counting circuitry in the ltc2943 integrates current through the sense resistor. the result of this charge integration is stored in the 16- bit accumulated charge register ( registers c, d). as the ltc2943 does not know the actual battery status at power-up, the accumulated charge register ( acr) is set to mid-scale (7 fffh). if the host knows the status of the battery, the accumulated charge ( c[7:0]d[7:0]) can be either programmed to the correct value via i 2 c or it can be set after charging to ffffh (full) by pulling the alcc pin low if charge complete mode is enabled via bits b[2:1]. note that before writing to the accumulated charge registers, the analog section should be temporarily shut down by setting b[0] to 1. in order to avoid a change in the accumulated charge registers between reading msbs c[7:0] and lsbs d[7:0], it is recommended to read them sequentially as shown in figure 10. voltage registers (i,j), and voltage threshold registers (k,l,m,n) the result of the 14-bit adc conversion of the voltage at sense C is stored in the voltage registers (i, j). from the result of the 16- bit voltage registers i[7:0]j[7:0] the measured voltage can be calculated as: v sense C = 23.6v ? result h ffff h = 23.6v ? result dec 65535 example 1: a register value i[7:0] = b0h and j[7:0] = 1ch corresponds to a voltage on sense C of: v sense C = 23.6v ? b01c h ffff h = 23.6v ? 45084 dec 65535 16.235v example 2: to set a low level threshold for the battery voltage of 7.2 v, register m should be programmed to 4eh and register n to 1ah. current registers (o,p) and current threshold registers (q,r,s,t) the result of the current conversion is stored in the cur - rent registers (o,p). as the adc resolution is 12 bits in current mode, the lowest four bits of the combined current registers (o, p) are always zero. the adc measures battery current by converting the volt - age, v sense , across the sense resistor r sense . depending on whether the battery is being charged or discharged, the measured voltage drop on r sense is positive or negative. the result is stored in registers o and p in excess C32767 representation. o [7:0] = ffh, p[7:0] = ffh corresponds to the full scale positive voltage 60 mv. while o[7:0] = 00h, p[7:0] = 00 h corresponds to the full scale negative volt - age C60 mv. the battery current can be obtained from the two byte register o[7:0]p[7:0] and the value of the chosen sense resistor r sense : i bat = v sense r sense = 60mv r sense ? result h ? 7fff h 7fff h ? ? ? ? = 60mv r sense ? result dec ? 32767 32767 ? ? ? ? ? ? ? ? positive current is measured when the battery is charg- ing and negative current is measured when the battery is discharging. applications information ltc2943 2943fa
14 for more information www.linear.com/ltc2943 example 1: a register value of o[7:0] = a8h p[7:0] = 40h together with a sense resistor r sense = 50m corresponds to a battery current: i bat = 60mv 50m ? a840 h ? 7fff h 7fff h = 60mv 50m ? 43072 ? 32767 32767 377.3ma ? ? ? ? ? ? ? ? ? ? ? ? the positive current result indicates that the battery is being charged. the values in the threshold register for the current mode q,r,s,t are also expressed in excess C32767 representa - tion in the same manner as the current conversion result. the alert after a current measurement is set if the result is higher than the value stored in the high threshold reg - isters q,r or lower than the value stored in the low value registers s,t. example 2: in an application, the user wants to get an alert if the absolute current through the sense resistor, r sense , of 50 m exceeds 1 a. this is achieved by setting the upper threshold i high in register [ q,r] to 1 a and the lower threshold i low in register [ s,t] to C1 a. the formula for i bat leads to: i high (dec) = 1a ? 50m 60mv ? 32767 + 32767= 60073 i low (dec) = ?1a ? 50m 60mv ? 32767 + 32767= 5461 ? ? ? ? ? ? ? ? ? ? ? ? leading the user to set q [7:0] = eah, r [7:0] = a9h for the high threshold and s [7:0] = 15 h and t[7:0] = 55 h for the low threshold. temperature registers (u,v), and temperature threshold registers (w,x) as the adc resolution is 11 bits in temperature mode, the lowest five bits of the combined temperature registers (u, v) are always zero. the actual temperature can be obtained from the two byte register u[7:0]v[7:0] by: t = 510k ? result h ffff h = 510k ? result dec 65535 example: a register value of u [7:0] = 96 h, v[7:0] = 96h corresponds to ~300k or ~27c a high temperature limit of 60 c is programmed by setting register w to a7h. note that the temperature threshold register is a single byte register and only the eight msbs of the 11 bits temperature result are checked. effect of differential offset voltage on total charge error in battery gas gauges, an important parameter is the differential offset ( v os ) of the circuitry monitoring the battery charge. many coulomb counter devices perform an analog to digital conversion of v sense , where v sense is the voltage drop across the sense resistor, and ac- cumulate the conversion results to infer charge. in such an architecture, the differential offset v os causes relative charge error of v os /v sense . for small v sense values v os can be the main source of error. the ltc2943 performs the tracking of the charge with an analog integrator. this approach allows to continuously monitor the battery charge and significantly lowers the error due to differential offset. the relative charge error due to offset (ce ov ) can be expressed by: ce ov = v os v sense ? ? ? ? 2 ? ? as example, at a 1 mv input signal, a differential voltage offset v os = 20 v results in a 2% error using digital integration, whereas the error is only 0.04% ( a factor of 50 times smaller!) using the analog integration approach of ltc2943. applications information ltc2943 2943fa
15 for more information www.linear.com/ltc2943 the reduction of the impact of the offset in ltc2943 can be explained by its integration scheme depicted in figure 2. while positive offset accelerates the up ramping of the integrator output from reflo to refhi, it slows the down ramping from refhi to reflo thus the effect is largely canceled as depicted below. i 2 c protocol the ltc2943 uses an i 2 c/ smbus- compatible 2-wire interface supporting multiple devices on a single bus. connected devices can only pull the bus lines low and must never drive the bus high. the bus wires are externally connected to a positive supply voltage via current sources or pull-up resistors. when the bus is idle, all bus lines are high. data on the i 2 c bus can be transferred at rates of up to 100 kbit/s in standard mode and up to 400 kbit/s in fast mode. each device on the i 2 c/smbus is recognized by a unique address stored in that device and can operate as either a transmitter or receiver, depending on the function of the device. in addition to transmitters and receivers, devices can also be classified as masters or slaves when perform - ing data transfers. a master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. at the same time any device addressed is considered a slave. the ltc2943 always acts as a slave. figure 4 shows an overview of the data transmission on the i 2 c bus. start and stop conditions when the bus is idle, both scl and sda must be high. a bus master signals the beginning of a transmission with a start condition by transitioning sda from high to low while scl is high. when the master has finished com - municating with the slave, it issues a stop condition by applications information figure 4. data transfer over i 2 c or smbus for input signals with an absolute value smaller than the offset of the internal op amp, the ltc2943 stops integrat- ing and does not integrate its own offset. i 2 c/smbus interface the ltc2943 communicates with a bus master using a 2- wire interface compatible with i 2 c and smbus. the 7-bit hard coded i 2 c address of the ltc2943 is 1100100. the ltc2943 is a slave only device. the serial clock line (scl) is input only while the serial data line ( sda) is bidirectional. the device supports i 2 c standard and fast mode. for more details refer to the i 2 c protocol section. 2943 f0b integrator output refhi reflo time with offset without offset faster up ramping slower down ramping scl sda start condition stop condition address r/w ack data ack data ack 1 - 7 8 9 2943 f04 a6 - a0 b7 - b0 b7 - b0 1 - 7 8 9 1 - 7 8 9 p s ltc2943 2943fa
16 for more information www.linear.com/ltc2943 figure 5. writing fch to the ltc2943 control register (b) transitioning sda from low to high while scl is high. the bus is then free for another transmission. when the bus is in use, it stays busy if a repeated start ( sr) is gener - ated instead of a stop condition. the repeated start (sr) conditions are functionally identical to the start (s). write protocol the master begins a write operation with a start condition followed by the seven bit slave address 1100100 and the r/w bit set to zero, as shown in figure 5. the ltc2943 acknowledges this by pulling sda low and the master sends a command byte which indicates which internal register the master is to write. the ltc2943 acknowledges and latches the command byte into its internal register address pointer. the master delivers the data byte, the ltc2943 acknowledges once more and latches the data into the desired register. the transmission is ended when the master sends a stop condition. if the master contin - ues by sending a second data byte instead of a stop, the applications information ltc2943 acknowledges again, increments its address pointer and latches the second data byte in the following register, as shown in figure 6. read protocol the master begins a read operation with a start condition followed by the seven bit slave address 1100100 and the r/w bit set to zero, as shown in figure 7. the ltc2943 acknowledges and the master sends a command byte which indicates which internal register the master is to read. the ltc2943 acknowledges and then latches the command byte into its internal register address pointer. the master then sends a repeated start condition fol - lowed by the same seven bit address with the r/w bit now set to one. the ltc2943 acknowledges and sends the contents of the requested register. the transmission is ended when the master sends a stop condition. if the master acknowledges the transmitted data byte, the ltc2943 increments its address pointer and sends the contents of the following register as depicted in figure 8. figure 6. writing f001h to the ltc2943 accumulated charge register (c, d) figure 7. reading the ltc2943 status register (a) figure 8. reading the ltc2943 voltage register (i, j) from master to slave s w address register data from slave to master 2943 f05 a: acknowledge (low) a : not acknowledge (high) s: start condition p: stop condition r: read bit (high) w: write bit (low) a a a 0 1100100 01h fch 0 0 0 p s w address register data 2943 f06 a a a 0 1100100 02h f0h 01h 0 0 0 0 p data a s w address register sr 2943 f07 a a address 0 1100100 00h 1 0 0 1100100 0 p r 1 a 01h data a s w address register sr 2943 f08 a a address 0 1100100 08h 1 0 0 1100100 0 p r 0 a f1h data 24h data a 1 a ltc2943 2943fa
17 for more information www.linear.com/ltc2943 alert response protocol in a system where several slaves share a common interrupt line, the master can use the alert response address (ara) to determine which device initiated the interrupt ( figure 9). sda pin to see if another device is sending an address at the same time using standard i 2 c bus arbitration. if the ltc2943 is sending a 1 and reads a 0 on the sda pin on the rising edge of scl, it assumes another device with a lower address is sending and the ltc2943 immediately aborts its transfer and waits for the next ara cycle to try again. if transfer is successfully completed, the ltc2943 will stop pulling down the alcc pin and will not respond to further ara requests until a new alert event occurs. pc board layout suggestions keep all traces as short as possible to minimize noise and inaccuracy. use a 4- wire kelvin sense connection for the sense resistor, locating the ltc2943 close to the resistor with short sense-traces to the sense + and sense C pins. use wider traces from the resistor to the battery, load and/or charger. put the bypass capacitor close to sense + and gnd. the master initiates the ara procedure with a start condition and the special 7-bit ara bus address (0001100) followed by the read bit (r) = 1. if the ltc2943 is as - serting the alcc pin in alert mode, it acknowledges and responds by sending its 7- bit bus address (1100100) and a 1. while it is sending its address, it monitors the applications information figure 9. ltc2943 serial bus sda alert response protocol figure 10. reading the ltc2943 accumulated charge registers (c, d) figure 12. kelvin connection on sense resistor figure 11. adc single conversion sequence and reading of voltage registers (i,j) s r alert response address device address 2943 f09 a 1 0001100 1100100 0 1 p a s w address register s 2943 f10 a a address 0 1100100 02h 1 0 0 1100100 0 p r 0 a 80h data 01h data a 1 a 40ms s w address register s 2943 f11 a a address 0 1100100 08h 1 0 0 1100100 0 p r 0 a f1h data 80h data a 1 a s w address register data a a 0 1100100 01h 4c 0 0 p ltc2943 2943 f12 r sense to battery to charger/load 3 2 1 6 7 8 4 5 c ltc2943 2943fa
18 for more information www.linear.com/ltc2943 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. ltc2943 2943fa
19 for more information www.linear.com/ltc2943 revision history rev date description page number a 05/14 corrected note 6 4 ltc2943 2943fa
20 for more information www.linear.com/ltc2943 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2013 lt 0514 rev a ? printed in usa related parts typical application part number description comments battery gas gauges ltc2941 battery gas gauge with i 2 c interface 2.7v to 5.5v operation, 6-lead (2mm 3mm) dfn package ltc2941-1 1a i 2 c battery gas gauge with internal sense resistor 2.7v to 5.5v operation, 6-lead (2mm 3mm) dfn package ltc2942 battery gas gauge with temperature/voltage measurement 2.7v to 5.5v operation, 14-bit ?-adc, 6-lead (2mm 3mm) dfn package ltc2942-1 1a battery gas gauge with internal sense resistor and temperature/voltage measurement 2.7v to 5.5v operation, 14-bit ?-adc, 6-lead (2mm 3mm) dfn package ltc4150 coulomb counter/battery gas gauge 2.7v to 8.5v operation, 10-pin msop package battery chargers ltc4000 high voltage high current controller for battery charging and power management 3v to 60v operation, 28-lead (4mm 5mm) qfn or ssop packages ltc4009 high efficiency, multi-chemistry battery charger 6v to 28v operation, 20-lead (4mm 4mm) qfn package ltc4012 high efficiency, multi-chemistry battery charger with powerpath? control 6v to 28v operation, 20-lead (4mm 4mm) qfn package lt3652hv power tracking 2a battery charger input supply voltage regulation loop for peak power tracking, 5v to 34v operation, 1mhz, 2a charge current, 3mm 3mm dfn-12 and msop-12 packages ltc1732 li-ion battery charger 4.5v to 12v operation, msop-10 package (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc2943 1 6 7 9 2 3 10 4 8 r prog* 19.6k r sense 0.25 i bat = 500ma v in = 10v c timer 0.1f mbrm120t3 sense drv v cc bat prog timer ltc1732-8.4 sel r2 1k r1 1k chrg acpr gnd c2 10f q1 si7135dp sense + alcc sda scl ltc2943 r4 2k r3 2k r5 2k 0.5a load r sense 100m 8.4v li-ion battery 2943 ta02 sense ? + gnd c3 1f v dd 3.3v p c1 1f 2-cell 8.4v linear charger and battery gas gauge ltc2943 2943fa

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